Computer systems, for example home computers or high-end computers operated as servers, may utilize memory to store data. The memory may comprise one or more memory modules that are connected together via a memory bus. The memory bus may utilize a signaling convention that facilitates the transfer of data between devices connected to the bus. The devices may comprise memory devices, data converters, and remote input/output ports.
To ensure that the memory associated with a computer system is functioning properly, an error detection mechanism within the computer system's chipset may monitor the memory and detect memory errors. When a memory error is detected, an error handling procedure may correct and/or report the memory error.
To validate and test the error detection mechanism, errors may be artificially injected into the chipset or manually forced at memory level. As memory bus speeds have increased, it may be difficult to reliably inject errors for the purpose of testing and validating the error detection mechanism. Furthermore, artificially injecting errors into chipset may adversely affect system validation.